Combinational Logic Synthesis Research Report for Advanced Logic Synthesis for Low Power Mobile Applications Project

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Combinational Logic Synthesis Research Report for Advanced Logic Synthesis for Low Power Mobile Applications Project
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ISBN-10 : OCLC:946113854
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Book Synopsis Combinational Logic Synthesis Research Report for Advanced Logic Synthesis for Low Power Mobile Applications Project by :

Book excerpt: Timed Shannon Circuits have been proposed as a low-power circuit design style 1 with the attractive properties of providing predictable, delay-insensitive low-power dissipation. In this report we present the results of a comprehensive evaluation to compare the designs generated using Timed Shannon Circuits versus those generated by a commercial logic synthesis program (Synergy).


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