Yield Improvement of Chemical Mechanical Planarization Processes

Book excerpt: Chemical mechanical polishing (CMP) is a planarization process that produces high quality surfaces both locally and globally. It is one of the key process steps during fabrication of very large scale integrated (VLSI) chips in integrated circuit (IC) manufacturing. High and reliable wafer yield is critical in the CMP process; it is dependent upon uniformity of material removal rate across the entire wafer. The focus on this research is the development of control algorithm for CMP process. Wafer-scale and die-scale models are the two scales used in this study. To achieve improvement in wafer yield, three control strategies are formulated with greedy algorithm, method heuristic and non-linear programming in this wafer-scale. The simulation results show that average wafer yield from genetic algorithm is improved, compared to greedy algorithm. Moreover, average wafer yield from non-linear programming is also improved, compared to greedy algorithm. At die-scale, a comprehensive control algorithm is developed based on the MRR equations with interface pressure as a control parameter. The interface pressure is varied spatially and/or temporally across the die. In this concept, three control strategies are developed and studied. The strategies are included spatial pressure control, spatial and temporal pressure control, and look-ahead scheduled pressure control. The simulation results of these three strategies show improvement in the upper surface uniformity; however, look-ahead scheduled pressure control seems to be the promising algorithm.